Tianhao Huang (黄天昊)

Tianhao Huang is currently a senior undergraduate majoring in Electronic Engineering of Tsinghua University, Beijing. He joined the Nanoscale Integrated Circuits and Systems (NICS) Lab, Department of Electronic Engineering since 2016. His research interests include architecture support for efficient graph processing and parallel computing.


Address: 4-101, Rohm Building, Tsinghua University, Beijing
Email: hth_harold☺yahoNOSPAMMINGo·com
Phone: (+86)18813119908

Selected Publications

Conference Papers

  • Tianhao Huang, Guohao Dai, Yu Wang and Huazhong Yang, HyVE: Hybrid Vertex-Edge Memory Hierarchy for Energy-Efficient Graph Processing , in Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018, pp.973-978. pdf
  • Guohao Dai, Tianhao Huang, Yuze Chi, Ningyi Xu, Yu Wang, Huazhong Yang, ForeGraph: Exploring Large-scale Graph Processing on Multi-FPGA Architecture , in ACM International Symposium on FPGA (FPGA), 2017, pp.217-226. pdf slide

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