Haixiao Du (杜海潇)


Haixiao Du is currently pursuing his Ph.D. degree in the Department of Electronic Engineering, Tsinghua University, Beijing, China. He received the B.S. degree with honor from Beijing Institute of Technology, Beijing, China, in 2011. Haixiao’s recent research mainly focused on heterogeneous hardware computing and emerging neuroscience.

Contact

Address: Room 4-101, Rohm Building,
Email: NOSPAMMINGduhx11☺mails·tsinghua·edu·cn
Phone: +86 13810276322

Selected Publications


Journal Articles

  • Haixiao Du, Mingrui Xia, Kang Zhao, Xuhong Liao, Huazhong Yang, Yu Wang, Yong He, PAGANI Toolkit: Parallel graph-theoretical analysis package for brain network big data , in Human brain mapping, vol.1, No.17, 2018. pdf
  • Haixiao Du, Xuhong Liao, Mingrui Xia, Qixiang Lin, Gushu Li, Yuze Chi, Huazhong Yang, Yu Wang, Yong He, Test-Retest Reliability of Graph Metrics in High-Resolution Functional Connectomics: A Resting-State Functional MRI Study , in CNS Neuroscience & Therapeutics, vol.21, No.10, 2015, pp.802-816. pdf
  • Yu Wang, Haixiao Du, Mingrui Xia, Ling Ren, Mo Xu, Teng Xie, Gaolang Gong, Ningyi Xu, Huazhong Yang, Yong He, A Hybrid CPU-GPU Accelerated Framework for Fast Mapping of High-Resolution Human Brain Connectome , in PloS one, vol.8, No.9, 2013, pp.e62789. pdf

Conference Papers

  • Haixiao Du, Minhui Ouyang, Cong Gao, Bo Hong, Huazhong Yang, Yu Wang, Hao Huang, Line propagation based on FDT probabilistic tracking (LPFPT) , in 2016 Annual Meeting of the Organization for Human Brain Mapping, accepted as a poster, 2016. pdf slide
  • Kang Zhao, Haixiao Du, Mingrui Xia, Huazhong Yang, Yu Wang, Yong He, PAGANI Toolkit: Parallel Computing Package for Fast Network Analyses of Brain Connectomes , in 2016 Annual Meeting of the Organization for Human Brain Mapping, accepted as a poster, 2016. pdf slide
  • Wulong Liu, Haixiao Du, Yu Wang, Yuchun Ma, Yuan Xie, Jinguo Quan, Huazhong Yang, TSV-aware topology generation for 3D clock tree synthesis , in Proceeding of the 14th International Symposium on Quality Electronic Design (ISQED), 2013, pp.300-307. pdf
  • Xin Li, Wulong Liu, Haixiao Du, Yu Wang, Yuchun Ma, Huazhong Yang, Whitespace-aware TSV arrangement in 3D clock tree synthesis , in Proceeding of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2013, pp.115-120. pdf

copyright 2019 © NICS Lab of Tsinghua University